Implementation of pulse coupled neural network neuron into FPGA device

This paper presents implementation of one pulse coupled neural network (PCNN) neuron into Virtex 4 FPGA device on ML 403 development board. The implementation consists of three units: Computing unit (CU), convolution computing unit (CCU) and MicroBlaze soft microprocessor. Neuron works with fixed point arithmetic, and is designed with the accent to effective utilization of the FPGA resources, parallelism and computing speed.