DEVELOPMENT PROCESS FOR DEPENDABLE HIGH-PERFORMANCE CONTROLLERS USING PETRI NETS AND FPGA TECHNOLOGY

A formal development process for logic controllers using Signal Interpreted Petri Nets and FPGA technology is presented. The development process covers all steps from design to implementation and is supported by the SIPN-Editor toolbox, a graphical editor that allows design, analysis and implementation of SIPN algorithms. As a new feature to increase dependability of logic controllers the SIPN-Editor toolbox supports export to VHDL language which allows implementation of SIPN algorithms on FPGA hardware. The implementation on FPGA is not only much faster than on an ordinary PLC hardware but also more dependable in several aspects. An algorithm to calculate a guaranteed response time is also given.