ASIC front-end interface with frequency and duty cycle output for resistive-bridge sensors

An application specific integrated circuit (ASIC) front-end interface in 0.7-μm CMOS for resistive-bridge sensors is proposed. The circuit is based on a relaxation oscillator where the frequency of the rectangular-wave output is related to the fractional bridge unbalance, and the duty cycle depends on the overall bridge resistance, which typically is related to temperature. In this way, two independent pieces of information are simultaneously and cost-effectively carried on the same output signal. The bridge is driven at constant current, this avoids accuracy degradation with remotely placed sensors and enables a first-order thermal compensation for piezoresistive semiconductor sensors. The circuit has been characterized by means of a 1-kΩ reference bridge showing frequency and duty cycle sensitivities of 60.4 Hz/(1000 ppm) and 0.276%/(mΩ/Ω), respectively, at a central frequency of about 6.4 kHz. The circuit has also been tested with a piezoresistive SiC sensor operated at temperatures up to 150 °C, showing results in agreement with theoretical predictions.