Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
746390 | Solid-State Electronics | 2016 | 8 Pages |
Abstract
•Thorough investigation of drain current local variability in advanced FDSOI devices.•Critical impact of source–drain access resistance variability on the overall mismatch properties.•Comprehensive Monte Carlo modeling of the drain current variability.
In this paper, we present, for the first time, a detailed investigation of the drain current local variability in advanced n-MOS devices from 28 and 14 nm FDSOI technology nodes. A simple MOSFET compact model is built to reproduce the local variability Id–Vg characteristics of paired transistors using a Monte Carlo simulation with normally distributed MOSFET parameters (Vth, β and Rsd).
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Authors
E.G. Ioannidis, S. Haendler, E. Josse, N. Planes, G. Ghibaudo,