| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 746462 | Solid-State Electronics | 2015 | 6 Pages |
For the first time, the investigation and fabrication of a high-voltage MOSFET (HVMOS) in Ultra-Thin Body and Buried oxide Fully Depleted technology (UTBB-FDSOI) is reported. Through TCAD simulations, the lateral electric field profile and related breakdown voltage behaviour are studied. Taking benefit of the FDSOI assets, an original HVMOS architecture, featuring a Dual Ground Plane, is proposed to optimize the electric field profile distribution. As a new lever for high voltage, the Dual Ground Plane enables a “RESURF-like” effect, electrostatically improving classical HVMOS figures of merit: the breakdown voltage (BV) and the specific-on resistance (RON.S). Experimental results confirm the potential of the Dual Ground Plane solution for HVMOS device in 28 nm UTBB-FDSOI technology and beyond.
