| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 746877 | Solid-State Electronics | 2013 | 5 Pages |
With the current scenario of different candidates to lead the road to 14 nm node and beyond, this work presents a thorough Multi-Subband Ensemble Monte Carlo (MS-EMC) study of the scaling possibilities of Extremely Thin Silicon on Insulator technology (ETSOI) considering the impact of Buried Oxide (BOX) engineering on the electrostatic integrity of devices addressed for the forthcoming technological nodes. The simulations show that the combined use of Ultra Thin BOX (UTBOX) and Ground Plane/Back Bias (GP/BB) plane are enabling techniques to ensure an adequate control of Short Channel Effects (SCEs) in order to extend the roadmap of ETSOI technology down to 11 nm node and beyond. BOX engineering also makes possible a redefinition of standard scaling rules relaxing the constraints on LG/TSi ratio with the advantage over Multiple Gate FETs (MuGFETs) based architectures of a fully compatible fabrication process with main stream planar technologies.
► A MSB-EMC code is used to asses scaling capabilities of ETSOI devices for the forthcoming technological nodes. ► The combined use of UTBOX and Ground Plane are enabling boosters to control SCEs. ► BOX engineering allows a redefinition of the standard scaling rules relaxing LG/TSi constraints.
