A new characterization technique for SOI wafers: Split C(V) in pseudo-MOSFET configuration

We demonstrate for the first time the feasibility of split C–V measurements on as-fabricated SOI wafers using pseudo-MOSFET configuration. An adapted methodology to determine the effective mobility of electrons and holes by split C–V technique is proposed and validated through comparison with the effective mobility extracted from static measurements. The method has been applied to different SOI materials (thin and thick film/BOX, passivated and non-passivated surface). The frequency and substrate depletion effects and the role of probe pressure and spacing are discussed. The electron mobility can exceed 500 cm2 V−1 s−1 in thin SOI films with passivated surface.

► Implementation of a novel characterization technique for bare SOI, based on split C-V measurement using pseudo-MOSFET. ► The effective mobility of electrons and holes is obtained from low-frequency split C-V measurements. ► Excellent agreement was obtained between effective mobility curves from Id (Vg) and from split C-V. ► The impact of surface passivation on the effective mobility was confirmed. ► The electron mobility can exceed 500 cm2V–1s–1 in thin SOI films with passivated surface.