| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 747020 | Solid-State Electronics | 2011 | 6 Pages |
As a result of recent trends in processor speed and core temperature, III–V semiconductors have become a tempting replacement for Si in semiconductor logic. However, as device geometries shrink, the advantages of such a switch are put into question. In this paper we present a computational survey of III–V materials in a tri-gate nanowire MOSFET geometry as compared with Si to determine an optimal material choice for this geometry using a 3D semi-classical Monte Carlo simulation tool. We show that InSb and InAs show promise as future materials for next generation switching devices.
Research highlights► 3D Semiclassical Monte Carlo simulation of III–V and Si tri-gate nanowire FETs. ► Schrodinger correction with Poisson solver and non-parabolic band approximation. ► Carrier velocity as opposed to quantum/dos capacitances vary Ids between materials. ► InAs and InSb show superior performance.
