Article ID Journal Published Year Pages File Type
747164 Solid-State Electronics 2011 6 Pages PDF
Abstract

We propose a disruptive reading and restoration scheme for a high density spin-transfer-torque random access memory (SPRAM). The proposed scheme uses the feature that – with a desired error rate and a tunnel magneto resistance (TMR) device, which is the memory device of the SPRAM – does not switch its magnetization of free layer in a specific period of large current pulse. The restoration operation is performed to secure the storing data. As a result, by keeping good scalability of spin-transfer-torque writing toward Gb-scale and beyond, high-speed reading with read-disturbance-free operation can be achieved. This operation also enables the SPRAM to accept the DDRx-SDRAM compatible operation. In addition, we also proposed a 4-F2 cell structure with a vertical transistor and prospected the reliability of a tunnel barrier of the TMR devices for a Gb-scale SPRAM.

Research highlights► We proposed a disruptive reading and restoring scheme for a gigabit scale SPRAM. ► Basic operation was confirmed by using a 32-Mb SPRAM chip. ► DDR SDRAM compatible SPRAM operation using the proposed scheme was proposed. ► We presented a 4F2 cell structure and prospect of the reliability of the TMR device.

Related Topics
Physical Sciences and Engineering Engineering Electrical and Electronic Engineering
Authors
, , , , , ,