Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
747202 | Solid-State Electronics | 2010 | 6 Pages |
Abstract
The impact of shallow trench isolation (STI) on non-volatile memories becomes much more severe with the CMOS technology scaling down to sub-90Â nm. In this work, the impact of STI on a polysilicon-oxide-nitride-oxide-silicon (SONOS) type memory has been investigated based on the experiments and TCAD simulation analysis. It has been found edge cells adjacent to STI have the lower channel-hot-electron (CHE) injection programming efficiency than center cells. In addition, edge cells exhibit different initial threshold voltage (Vt) distribution compared with center cells. STI impact is thought to be the main reason for these problems. To reduce the impact of STI, an additional boron implantation in STI BL contacts region is developed as a new solution. As a result, the performance differences between edge and center cells have been substantially minimized.
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Authors
Yue Xu, Feng Yan, DunJun Chen, Yi Shi, ZhiGuo Li, Fan Yang, Joshua Wang, YongGang Wang, Peter Lin, Jianguang Chang, Champion Yi,