Effect of interface states on sub-threshold response of III–V MOSFETs, MOS HEMTs and tunnel FETs

The effect of interface states on the current–voltage characteristics in the sub-threshold region of three different types of III–V based transistor architectures has been studied using a drift–diffusion based numerical simulator. Experimentally extracted interface state density profile is included in the simulation to analyze their effect on the sub-threshold response of InGaAs based MOSFETs, MOS HEMTs and tunnel FETs. Based on the Fermi-level position at the oxide/semiconductor interface and the corresponding interface state density (Dit), the sub-threshold response for the three devices can vary, with tunnel FETs having the least sub-threshold degradation due to Dit.