Drain current model for nanoscale double-gate MOSFETs

A closed form inversion charge-based drain current model for a short channel symmetrically driven, lightly doped symmetric double-gate MOSFET (SDGFET) is presented. The model has physical origins, but has some fitting parameters included in order to yield a better match with TCAD device simulations. Velocity saturation and channel length modulation effects are self-consistently included in the model. The incorporation of DIBL effects in the model is based on a solution of the two-dimensional Laplace equation that had been reported earlier and that is believed to be especially suited when the physical gate-oxide thickness is not negligible compared to the silicon body thickness. Addition of support for body doping and low-field mobility degradation is also presented. A very good match is shown in Id–Vg, Id–Vd and gDS–Vd curves and a reasonable match is shown in gm–Vg curves, when compared with 2D device simulations. The match in various characteristics is shown for devices as short as 20 nm.