Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
747465 | Solid-State Electronics | 2009 | 6 Pages |
Abstract
This work proposes a planar fully depleted “folded” technology integrated on bulk substrate as an innovative solution for upcoming low power nodes to enhance drive current on narrow devices. We report a detailed fabrication method, combining advanced selective epitaxy faceting and SON (Silicon-On-Nothing) process, to provide ultra thin body and buried oxide (UTB2) devices with improved drive current Ion for a given designed footprint Wdesign when scaling the device width. We compare the fabrication and electrical behavior between 〈1 1 0〉 channel, i.e. 0°-rotated wafer, and 〈1 0 0〉 channel, i.e. 45°-rotated wafer, for the same (1 0 0) surface orientation.
Related Topics
Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
G. Bidal, N. Loubet, C. Fenouillet-Beranger, S. Denorme, P. Perreau, D. Fleury, L. Clement, C. Laviron, F. Leverd, P. Gouraud, S. Barnola, R. Beneyton, A. Torres, C. Duluard, J.D. Chapon, B. Orlando, T. Salvetat, M. Grosjean, E. Deloffre, R. Pantel,