| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 747473 | Solid-State Electronics | 2009 | 6 Pages |
Abstract
In this work, we present an experimental and theoretical study of nitride-trap devices with a HTO/Al2O3 bi-layer blocking oxide. Such (Silicon/Alumina/HTO/Nitride/Oxide/Silicon) SAONOS devices are compared with standard (Silicon/HTO/Nitride/Oxide/Silicon) SONOS and (Silicon/Alumina/Nitride/Oxide/Silicon) SANOS memories. The role of the different layers (blocking oxide and control gate) is deeply analyzed, focusing on their impact on memory performance and reliability. Then, a semi-analytical model is developed, which provides a good understanding of the physical mechanisms at the origin of program/erase characteristics.
Keywords
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
M. Bocquet, G. Molas, L. Perniola, X. Garros, J. Buckley, M. Gély, J.P. Colonna, H. Grampeix, F. Martin, V. Vidal, A. Toffoli, S. Deleonibus, G. Ghibaudo, G. Pananakakis, B. De Salvo,