Recessed channel and/or buried source/drain structures for improvement in performance of Schottky barrier source/drain transistors with high-k gate dielectrics

The subject of this paper is a study on the effects of recessed channel and/or buried source/drain structures on electrical characteristics of Schottky barrier source/drain transistors with gate dielectrics having high dielectric constants using numerical simulations. It is shown that recessed channel structures are quite effective for improving cutoff characteristics. This phenomenon can be understood in terms of the fact that controllability of a gate electrode over electrical potential of a channel region near a source/channel interface increases due to an increase in capacitive coupling between gate and channel. It is also shown that buried source/drain structures are quite effective for suppressing electric field strength in gate dielectrics and increasing current drivability. These phenomena can be understood in terms of the fact that a corner of source region, around which electric field strength is quite high, is far from gate dielectrics and that electrical current can flow out of not only side but also upper surface of source region.