An optimization technique for parameter extraction of ultra-deep submicron LDD MOSFET’s

An optimization technique to determine the threshold voltages Vth is proposed for meaningful parameter extractions of ultra-deep submicron LDD MOSFETs. The novel technique, coupled with some traditional Vth determination techniques, are implemented in several existing extraction methods to extract the parasitic series resistance Rds, the effective channel length Leff , and the effective mobility μeff of ultra-thin gate oxide LDD MOSFETs on 90 nm CMOS technology. A comparison among these extractions demonstrates that the technique of Vth optimization maintains the accuracy of extractions, avoids the intentional choice of the gate voltage range, and eliminates the impact of close interdependence among these parameters on the meaningful extraction, especially at high gate voltage range. Furthermore, the novel technique can reduce the extraction variance of different extraction methods, hence, suitable for application in device compact model.