Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
747849 | Solid-State Electronics | 2015 | 6 Pages |
Abstract
We performed constant voltage stresses with different bias conditions on all-organic complementary inverters. We found a 20% maximum variation of DC inverter parameters after a 104-s stress. However, the largest stress-induced degradation was found in the delay times, which increased by a factor as high as 7. This is mainly due to the threshold voltage variation of the p-type thin-film-transistor and the mobility reduction of the n-type thin-film transistors, which both decrease the saturation drain current.
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Authors
N. Wrachien, A. Cester, N. Lago, A. Rizzo, R. D’Alpaos, A. Stefani, G. Turatti, M. Muccini, G. Meneghesso,