Article ID Journal Published Year Pages File Type
748253 Solid-State Electronics 2013 8 Pages PDF
Abstract

Combining simultaneously on the fly interface-trap (OTFIT) and the reverse voltage variation of source and drain (S/D) during measurement phase of measure/stress/measure (MSM) sequences, we have been able to scan the negative bias temperature instability (NBTI) across the channel length of PMOS transistors. In addition, we have analyzed the generation and evolution of interface-trap distribution with respect to the transistor gate length. We have found that NBTI-induced interface-trap density, ΔNit are not uniform along the channel. The experimental results reveal an evident propagation of the NBTI degradation. This propagation starts from S/D channel edges and penetrates into the channel center. It is accelerated by temperature and electric field until saturation. However, field-accelerated propagation seems more important than temperature-accelerated one. Further, transistors with shorter channel length degrade more rapidly than those with longer channel length. We have also shown that the channel length has a great effect on NBTI features such as the apparent activation energy and time power-law exponent. These results suggest that diffusion-limited process is not the sole source of the time degradation dependence, but also gate length have to be taken into account.

► NBTI propagation along the transistor channel. ► NBTI degradation is more sever in shorter than longer channel transistors. ► NBTI degradation propagates from weak edge regions to strong channel center region. ► NBTI propagation is accelerated with field and temperature till saturation. ► R–D process is not the sole source of the time degradation dependence.

Related Topics
Physical Sciences and Engineering Engineering Electrical and Electronic Engineering
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