Article ID Journal Published Year Pages File Type
748534 Solid-State Electronics 2006 6 Pages PDF
Abstract

In this work, the electrical characteristic enhancement of HfTaSiON-gated metal–oxide–semiconductor devices with an additional HfON buffer layer was investigated. By forming a proper thickness of HfON buffer layer at HfTaSiON/Si interface, thermal stability and electrical characteristic enhancement including EOT, hysteresis, interface trap density, stress-induced leakage current and stress-induced flatband voltage shift can be achieved. X-ray photoelectron spectroscopy (XPS) demonstrates that the atomic percentage of Si–O bonds in interfacial layer is increased by introducing HfON buffer layer at HfTaSiON/Si interface. X-ray diffraction (XRD) depicts that, while deposited on the HfON buffer layer, the HfTaSiON film shows a more significant crystalline retardation characteristic.

Related Topics
Physical Sciences and Engineering Engineering Electrical and Electronic Engineering
Authors
, , , ,