Article ID Journal Published Year Pages File Type
748555 Solid-State Electronics 2006 6 Pages PDF
Abstract

With continuous scaling of gate dielectrics with technology scaling to nanoscale regime, an accurate direct tunneling modeling is critical and necessary to understand the scaling limits. In this paper, direct tunneling model based on WKB approximation, and three-subband quantum mechanical simulations have been used to calculate the inversion layer charge density and then model the gate leakage current for SiO2 and several different high-k gate dielectrics. The scaling limits of high-k gate dielectrics are then explored based on their direct tunneling characteristics. The gate voltage and surface potential dependence of the gate current density for SiO2 and several high-k materials are studied as well. The effects of effective oxide thickness, dielectric constant and barrier height on the direct tunneling current are studied as a function of gate voltages. Simulation results show that high-k dielectrics such as HfO2, Al2O3, La2O3 demonstrate significant gate leakage reduction.

Related Topics
Physical Sciences and Engineering Engineering Electrical and Electronic Engineering
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