Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
748597 | Solid-State Electronics | 2012 | 4 Pages |
This paper presents the study of an interface preparation procedure in the source/drain regions of the active layer, prior to deposit the n+ a-Ge:H contact layer in the fabrication process of low-temperature a-SiGe:H thin-film transistors. The devices were fabricated on corning 1737 substrates at 200 °C. The improvement in metal–semiconductor interface by the interface preparation procedure was demonstrated. This interface improvement translates in higher mobility and better values of off-current, on/off-current ratio, subthreshold slope and threshold voltage.
► Interface preparation procedure leads to achieve a good quality device interfaces. ► Interface improvements translate in higher mobility and better TFT performance. ► Applied hydrogen plasma reduces the plasma-induced damage. ► Poor quality in device interfaces is obtained by higher overetching process.