Photocapacitance study at p–i–n photodiode by numerical C–V integration

This paper describes a different numerical approach to estimate the impurity profile in a typical p–i–n device by using measured capacitance–voltage (C–V) characteristics. The constructed numerical model has been found to provide an impurity profile which is almost consistent with those reported in the literature. Until now, no study of the anomalous capacitance response of the silicon p–i–n device induced by the space charge effects due to photo-generated carriers has been reported. In this study, we unveiled this anomalous behaviour through illuminated C–V characteristics. The illuminated C–V result of BPW34 exhibits capacitance oscillations. This behaviour could be augmented by the density of states discontinuities in intrinsic silicon [Biswajit Das. Observation of capacitance–voltage oscillations in porous silicon. Physica E: Low-dimens Syst Nanostruct 2004;23(1–2):141–46].