Physical understanding and modeling of SANOS retention in programmed state

SANOS technology is the first time accurately analyzed and modeled. Firstly, the retention is studied on capacitors to determine the main retention mechanisms. The electron detrapping in the silicon nitride, followed by tunneling through the aluminum oxide is found to be the dominant mechanism causing the retention loss. The modeling of this effect reproduces the observed temperature, gate work function and window dependency. Secondly, these results are applied to scaled devices where the retention is dominated by the same mechanisms. The difference in the retention loss between capacitors and devices is explained by a different field distribution in the gate dielectric. Thirdly, the issue of lateral redistribution occurring at high temperature in scaled transistors is analyzed by 2D simulations and retention tests in SONOS devices.