STI-to-gate distance effects on flicker noise characteristics in 0.13 μm CMOS

The geometry effect on the flicker noise characteristics and the variations in 0.13 μm CMOS transistors were studied. By symmetrically extending the distance between the shallow-trench-isolation (STI) to the gate, both NMOS and PMOS presented obvious improvement on the noise characteristics. As the distance increased from 0.6 μm to 10 μm, the average noise level reduced by more than one order of magnitude (NMOS) and the standard deviations σdB improved from 5.95 dB to 1.79 dB for NMOS and from 3.93 dB to 2.17 dB for PMOS, respectively. To further identify the noise mechanism, the devices with asymmetrical STI-to-gate distances were also investigated. It was found that the distance in the source side (SA) has a much higher impact on the observed noise characteristics. The results suggested that the noise characteristics were dominated by the STI stress induced traps for both NMOS and PMOS studied here. In addition, the carrier number fluctuation model with the correlated mobility scattering could be more suitable to describe the noise characteristics in these devices.