Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
749475 | Solid-State Electronics | 2007 | 8 Pages |
We present the fabrication and characterization of ultra thin and relatively thick SiGe-On-Insulator wafers with different Ge contents prepared by Ge condensation technique. The fabrication procedures as well as the structural analysis are detailed. The electrical properties of advanced strained SiGe-On-Insulator (SGOI) and relaxed Germanium-On-Insulator (GeOI) wafers were investigated using the Pseudo-MOSFET method and then compared with Silicon-On-Insulator (SOI) and strained Silicon-On-Insulator (sSOI) structures. GeOI wafers with 10-nm and 100-nm film thickness show exceptionally high hole mobility as compared to both SOI and sSOI structures. The hole mobility can reach 400 cm2/V s. It is found that the mobilities for holes and electrons vary in opposite directions as the Ge fraction is increased. The Ge content also impacts the threshold and flat-band voltages.