| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 753070 | Solid-State Electronics | 2011 | 4 Pages |
InP-based high electron mobility transistors (HEMTs) were fabricated by depositing Pt-based multilayer metallization on top of a 6-nm-thick InP etch stop layer and then applying a post-annealing process. The performances of the fabricated 55-nm-gate HEMTs before and after the post-annealing were characterized and were compared to investigate the effect of the penetration of Pt through the very thin InP etch stop layer. After annealing at 250 °C for 5 min, the extrinsic transconductance (Gm) was increased from 1.05 to 1.17 S/mm and Schottky barrier height was increased from 0.63 to 0.66 eV. The unity current gain cutoff frequency (fT) was increased from 351 to 408 GHz, and the maximum oscillation frequency (fmax) was increased from 225 to 260 GHz. These performance improvements can be attributed to penetration of the Pt through the 6-nm thick InP layer, and making contact on the InAlAs layer. The STEM image of the annealed device clearly shows that the Pt atoms contacted the InAlAs layer after penetrating through the InP layer.
Research highlights► InP based p-HEMTs were fabricated by using buried-Pt gate on the 6-nm InP layer. ► Pt atoms penetrated the InP layer and made Schottky contact on the InAlAs layer. ► Pt atoms reacted with the InAlAs layer to form a PtAs2 alloy. ► PtAs2 alloy enhanced the Schottky barrier height. ► Buried-Pt gate on the InP layer improved the DC, RF and switching performances.
