Fully-depleted Ge interband tunnel transistor: Modeling and junction formation

Complementary fully-depleted Ge interband-tunneling field-effect transistors (TFETs) and static inverters are modeled to quantify TFET performance relative to Si MOSFETs. SYNOPSYS TCAD is used to compute the two-dimensional electrostatics and determine the tunnel junction electric field. This electric field is used in an analytic expression to compute the tunnel current. The speed and power performance of TFETs are compared with the nMOSFET at the same supply voltage, 0.5 V. For a gate length of 20 nm, Ge tunnel transistors can provide similar speed in comparison to 45-nm-node nMOSFETs (18 nm gate length), but saves more than 2× in power and lowers energy by over 7×. Toward demonstrating these transistors, a process for forming submicron p+n+ Ge tunnel junctions has been utilized in which Al-doped p+ Ge is regrown on n+ Ge, following melt-back of a patterned Al deposition. Transmission electron microscopy (TEM) reveals the regrown film and a contact microstructure consistent with the Al–Ge phase diagram. The low peak-to-valley current ratio (PVR) of devices produced by this growth method is likely a result of point defects or junction doping non-uniformity as TEM suggest no dislocations at the regrown junction. The PVR of these junctions does not improve as the device area is reduced from 100 to 0.1 μm2, a size smaller than the formation scale for grains in the Al–Ge system.