| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 753425 | Solid-State Electronics | 2008 | 6 Pages |
Abstract
The performances of accumulation-mode and inversion-mode multigate FETs are compared. The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode FETs.
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
Chi-Woo Lee, Dimitri Lederer, Aryan Afzalian, Ran Yan, Nima Dehdashti, Weize Xiong, Jean-Pierre Colinge,