Some issues of hot-carrier degradation and negative bias temperature instability of advanced SOI CMOS transistors

Some interesting observations of hot carrier stress induced aging effects across various SOI CMOS technologies are reported in this paper. First, the influence of the floating-body strength on the hot-carrier induced degradation in N-channel 90 nm partially depleted SOI MOSFETs is investigated. Enhanced hot-carrier degradation with increasing floating-body strength is observed and possible physical mechanisms to explain the obtained results are suggested. A channel width dependent degradation mechanism, arising from the SOI nature is observed: lower degradation obtained for the narrower channels is attributed to the weakening of floating-body effect with decreasing channel width. In addition, measured data provide experimental evidence of a shift in the location of the damage in the channel further away from the drain at elevated temperatures which may be responsible for the enhanced saturation current degradation obtained when stressing the devices at elevated temperatures. With regard to P-channel SOI MOSFETs, an investigation of the aging/recovery mechanisms is carried out under various stress bias conditions. It is found that worst case degradation occurs at stress under high gate/high drain bias rather than the conventional low gate/high drain bias, which at closer examination it is actually found to be mainly due to concurrent Negative Bias Temperature stress, accelerated by device self-heating.