Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
7888858 | Ceramics International | 2018 | 10 Pages |
Abstract
DIPAS (di-isopropylamino silane, H3Si[N(C3H7)2]) and O2 plasma were employed, using plasma-enhanced atomic layer deposition (PEALD), to deposit silicon oxide to function as the gate dielectric at low temperature, i.e., below 200 °C. The superior amorphous SiO2 thin films were deposited through the self-limiting reactions of atomic layer deposition with a deposition rate of 0.135 nm/cycle between 125 and 200 °C. PEALD-based SiO2 thin layer films were applied to amorphous oxide thin film transistors constructed from amorphous In-Ga-Zn-O (IGZO) oxide layers, which functioned as channel layers in the bottom-gated thin film transistor (TFT) structure, with the aim of fabricating transparent electronics. The SiO2 gate dielectric exhibited the highest TFT performance through the fabrication of heavily doped n-type Si substrates, with a saturation mobility of 16.42 cm2/V·s, threshold voltage of 2.95 V and large on/off current ratio of 3.69 à 108. Ultimately, the highly doped Si was combined with the ALD-based SiO2 gate dielectric layers, leading to a saturation mobility of 16.42 cm2/V·s, threshold voltage of 2.95 V, S-slope of 0.1944, and on/off current ratio of 3.69 à 108. Semi-transparent and transparent TFTs were fabricated and provided saturation mobilities of 22.18 and 24.29 cm2/V·s, threshold voltages of 4.18 and 2.17 V, S-slopes of 0.1944 and 0.1945, and on/off current ratios of 9.63 à 108 and 1.03 à 107, respectively.
Related Topics
Physical Sciences and Engineering
Materials Science
Ceramics and Composites
Authors
Yoo-Jin Choi, Seung-Muk Bae, Jae-Hwan Kim, Eui-Hyun Kim, Hee-Soo Hwang, Jeong-Woo Park, Heesun Yang, Eunsoo Choi, Jin-Ha Hwang,