Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
7938550 | Superlattices and Microstructures | 2018 | 26 Pages |
Abstract
In this paper, we propose a SiC LDMOS structure with a step compound drift region (SC-LDMOS). The proposed device has a compound drift region which consists of an n-type top layer, a step p-type middle layer and an n-type bottom layer. The step p-type middle layer can introduce two new electric field peaks and uniform the distribution of the electric field in the n-type top layer, which can modulate the surface electric field and improve the breakdown voltage of the proposed structure. In addition, the n-type bottom layer is applied under the heavy doping p-type middle layerï¼which contributes to realize the charge balance. Furthermore, it can also increase the doping concentration of the n-type top layer, which can decrease the on resistance of the proposed device. As a simulated result, the proposed device obtain a high BV of 976â¯V and a low Rsp,on of 7.74â¯mΩ·cm2. Compared with the conventional single REUSRF LDMOS and triple RESURF LDMOS, BV of proposed device is enhanced by 42.5% and 14.7%, respectively and Rsp,on is reduced by 37.3% and 30.9%, respectively. Meanwhile, the switching delays of the proposed device are significantly shorter than the conventional triple RESURF LDMOS.
Related Topics
Physical Sciences and Engineering
Materials Science
Electronic, Optical and Magnetic Materials
Authors
Meng-tian Bao, Ying Wang, Cheng-hao Yu, Fei Cao,