Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
7939197 | Superlattices and Microstructures | 2018 | 23 Pages |
Abstract
The sub-threshold model formulation of Gaussian Doped Double Gate JunctionLess (GD-DG-JL) FET including source/drain depletion length is reported in the present work under the assumption that the ungated regions are fully depleted. To provide deeper insight into the device performance, the impact of gaussian straggle, channel length, oxide and channel thickness and high-k gate dielectric has been studied using extensive TCAD device simulation.
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Physical Sciences and Engineering
Materials Science
Electronic, Optical and Magnetic Materials
Authors
Vandana Kumari, Ayush Kumar, Manoj Saxena, Mridula Gupta,