Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
7939871 | Superlattices and Microstructures | 2017 | 18 Pages |
Abstract
This paper presents an extensive survey on impact of interface trap charges on JLTFET. Objective of our work is to analyze degradation in performance of our device due to presence of interface trap charge present between Si-SiO2 interface. Effect of interface trap charges on drain current, transconductance, higher order transconductance, linearity and distortion parameter (VIP2, VIP3, IIP3, IMD3, Zero crossover point, 1-dB compression point) has been studied. High linearity and low distortion demands high value of VIP2, VIP3, IIP3, 1-dB compression point and low value of IMD3, Zero crossover point, higher order transconductance parameter. Through our simulations we have found that presence of interface trap charges leads to curtailment in reliability and life time of device.
Related Topics
Physical Sciences and Engineering
Materials Science
Electronic, Optical and Magnetic Materials
Authors
Bhaskar Awadhiya, Sunil Pandey, Kaushal Nigam, Pravin N. Kondekar,