Investigation of gate material engineering in junctionless TFET to overcome the trade-off between ambipolarity and RF/linearity metrics

In this work, we investigate for the first time dual material control gate junctionless tunnel-field effect transistor (DMCG-JLTFET) to improve the metrics in terms of DC, analog/RF parameters, and linearity performance. In this regard, we have considered N-type heavily doped silicon and formation of P+ source and intrinsic region beneath gate are performed by work-function engineering (dual material) concept with the deposition of metal electrodes over the silicon body, while, the drain region and the gap between source and channel remains with its original N+ doping. This forms the P+-N+-I-N+ gated structure similar to pocket doped TFET and prevents the device from random dopant fluctuations (RDFs). The gate electrode used to form the intrinsic region is partitioned into three parts namely auxiliary gate (M1), control gate (M2), and tunnel gate (M3) with work-functions ϕM1, ϕM2 and ϕM3, respectively where (ϕM1 = ϕM3 < ϕM2). Appropriate work-functions for the gate electrodes (M1, M2 and M3) in DMCG-JLTFET are used to address the trade-off between the ambipolarity and RF/linearity parameters. It provides superior results in terms analog/RF and linearity performance as compared to other possible combinations.