Article ID Journal Published Year Pages File Type
7941049 Superlattices and Microstructures 2017 13 Pages PDF
Abstract
This work integrates the merits of gate-drain underlapping (GDU) and N+ source pocket on cylindrical gate all around tunnel FET (GAA-TFET) to form GDU-PNIN-GAA-TFET. It is analysed that the source pocket located at the source-channel junction narrows the tunneling barrier width at the tunneling junction and thereby enhances the ON-state current of GAA-TFET. Further, it is obtained that the GDU resists the extension of carrier density (built-up under the gated region) towards the drain side (under the underlapped length), thereby suppressing the ambipolar current and reducing the parasitic capacitances of GAA-TFET. Consequently, the amalgamated merits of both engineering schemes are obtained in GDU-PNIN-GAA-TFET that thus conquers the greatest challenges faced by TFET. Thus, GDU-PNIN-GAA-TFET results in an up-gradation in the overall performance of GAA-TFET. Moreover, it is realised that the RF figure of merits FOMs such as cut-off frequency (fT) and maximum oscillation frequency (fMAX) are also considerably improved with integration of source pocket on GAA-TFET. Thus, the improved analog and RF performance of GDU-PNIN-GAA-TFET makes it ideal for low power and high-speed applications.
Related Topics
Physical Sciences and Engineering Materials Science Electronic, Optical and Magnetic Materials
Authors
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