Numerical and experimental studies on the Black Periphery Wafer in CZ Si growth

In Cz silicon crystal growth, in order to study the causes and solutions for the lower minority carrier lifetime on the periphery of the wafer (Black Periphery Wafer, BPW), experiments and numerical simulations are conducted for the measuring and modeling of the solid/liquid interface, the heater power, the impurity concentration, the minority carrier lifetime and the point defects. The solid/liquid interface and heater power in modeling are consistent with the experimental results. The real CZ Si production processes can be effectively reproduced by our modeling. One main cause of Black Periphery Wafer is determined as the OSF-ring. In order to eliminate the OSF-ring, a higher pulling rate is proposed so that to increase the V/G ratio. Experimental measurements and modeling results proved that, with proper higher pulling rate, the BPW has been eliminated effectively and the minority carrier lifetime on the periphery of the wafer has been increased.