Optimization of Drain Current and Voltage Characteristics for DP4T Double-Gate RF CMOS Switch at 45-nm Technology

Independent gate control in double-gate devices enhances the circuit performance and robustness while substantially reducing leakage and chip area. In this paper, we have explored the circuit techniques for a DP4T RF CMOS switch, which is an application of the independent double-gate MOSFET with symmetrical gate at 45-nm technology design and analyzed the better drain current, output voltage, ON resistance, ON/OFF ratio and insertion loss for the DP4T DG RF CMOS switch.