Article ID Journal Published Year Pages File Type
864265 Procedia Engineering 2010 4 Pages PDF
Abstract

Silicon nanowires (SiNWs) are synthesized following two methods: (i) the VLS (Vapor-Liquid-Solid) growth technique (bottom up approach), and (ii) the sidewall spacer fabrication (top down approach) commonly used in microelectronic industry. The VLS growth technique uses gold nanoparticles to activate the vapor deposition of the precursor gas and initiate a 100 nm diameter SiNWs network growth. In the case of the sidewall spacer method, a polysilicon layer is deposited by LPCVD (Low Pressure Chemical Vapor Deposition) technique on SiO2 wall patterned by conventional UV lithography technique. Polysilicon film is then plasma etched. Accurate control of the etching rate leads to the formation of spacers with a 100 nm curvature radius that can be used as polysilicon NWs. Each kind of nanowires is integrated into resistors fabrication. Electrical measurements show the potential usefulness of these SiNWs as chemical sensors.

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Physical Sciences and Engineering Engineering Engineering (General)