Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9699158 | Materials Science in Semiconductor Processing | 2005 | 5 Pages |
Abstract
The thermal stability of strained Si0.8Ge0.2 and Si devices with HfO2 gate dielectrics prepared by atomic layer chemical vapor deposition is studied. The interfacial layer at the HfO2/Si or HfO2/SiGe interface changed after different annealing temperatures. The thickness of the interfacial layer increases with increasing annealing temperature due to the trace amount of oxygen in the chamber or at the HfO2 dielectric. The capacitance equivalent thickness (CET) increases with increasing post-deposition annealing (PDA) temperature because of the increase of the interfacial layer. The interfacial trap charge densities (Dit) for the SiGe and Si devices with the PDA temperature of 600 °C are found to be 7.5Ã1012 and 1.8Ã1011 cmâ2 eVâ1, respectively. The electrical characteristics of the SiGe device are slightly inferior to the Si device due to the elemental Ge at the HfO2/SiGe interface. Obvious crystallization of HfO2 in SiGe devices with higher annealing temperature causes the raising of leakage current.
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Electrical and Electronic Engineering
Authors
T.C. Chen, L.S. Lee, W.Z. Lai, C.W. Liu,