Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9699170 | Materials Science in Semiconductor Processing | 2005 | 4 Pages |
Abstract
This paper reports on the transistor design of high-speed SiGe HBTs with low parasitic resistances and capacitances. Elevated extrinsic base regions and a low-resistance collector design were integrated in a SiGe:C BiCMOS technology to simultaneously minimize base and collector resistances and base-collector capacitance. This technology features CML ring oscillator delays of 3.6Â ps per stage for HBTs with fT/fmax values of 190/243Â GHz and a BVCEO of 1.9Â V.
Keywords
Related Topics
Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
H. Rücker, B. Heinemann, R. Barth, D. Knoll, P. Schley, R. Scholz, B. Tillack, W. Winkler,