Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
9699192 | Materials Science in Semiconductor Processing | 2005 | 6 Pages |
Abstract
Vertically integrated npnp Si-based RITD pairs are realized by stacking two RITDs with a connecting backwards diode between them. The I-V characteristics of the vertically integrated RITDs pairs demonstrate two sequential negative differential resistance (NDR) regions under forward biasing. Tri-state logic is demonstrated by using the vertically integrated RITDs as the drive and an off-chip resistor as the load.
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Authors
Niu Jin, Sung-Yong Chung, Roux M. Heyns, Paul R. Berger, Ronghua Yu, Phillip E. Thompson, Sean L. Rommel,