Process integration of infrared-sensitive PIN photodiodes and CMOS transistors in a single-SiGe substrate

The process integration of infrared-sensitive PIN photodiodes and CMOS transistors in a single 200 mm SiGe substrate is reported in this paper. Si0.76Ge0.24 virtual substrates with a strained Si layer were manufactured in a LPCVD epitaxy reactor. The strained silicon layer enhances the electron mobility in NMOS transistors and the hole mobility in PMOS transistors. The lower bandgap of the Si0.76Ge0.24 material improves the infrared responsivity of the PIN photodiodes at wavelengths up to 1310 nm. Results of process integration and electro-optical characterization of the manufactured devices are shown in this paper.