Article ID Journal Published Year Pages File Type
9699199 Materials Science in Semiconductor Processing 2005 8 Pages PDF
Abstract
We present an integrated clock synthesizer in SiGe:C BiCMOS technology. The synthesizer is aimed at low-jitter applications requiring a wide continuous frequency range at low power consumption. It uses an nMOS VCO with an LC tank and differential tuning followed by a bipolar dual-modulus prescaler. The circuit draws 28 mA from a 2.5 V supply. The measured rms output jitter of the PLL was below 2  ps over the whole tuning range from 4.9 to 6.1 GHz.
Related Topics
Physical Sciences and Engineering Engineering Electrical and Electronic Engineering
Authors
, , ,