90 nm device validation of the use of a single-wafer, high-current implanter for high tilt halo implants

As CMOS device dimensions shrink, the depths of the halo regions are shrinking and the implant doses used to form these regions are increasing to minimize short-channel effects. Shallow implant depths require lower implant energies, so the beam currents and wafer throughputs on the traditionally used medium-current implanters are starting to drop and become a concern for device manufacturers. In addition, halo implants are typically performed with a high tilt angle of 20-30° and require tight angle control. All of these requirements are leading to increased interest in use of single-wafer, high-current implanters for halo implants. This paper reports the results of a study where 90 nm CMOS transistors had halo implants performed on the Applied Materials' Quantum® X implanter. A comparison with device wafers whose halos were implanted on a medium-current implanter was also conducted. In addition, the sensitivity of the device parameters to the implant dose and angle was evaluated.