| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 10328904 | Electronic Notes in Theoretical Computer Science | 2005 | 19 Pages |
Abstract
This paper presents an approach that allows the VeriSoft state exploration system to be used to analyze Java RMI programs for deadlock, livelock, divergence, and assertion violations. The system works by transforming Java RMI programs into C++ programs where Java syntax, structure, concurrency and memory management are replaced by C++ equivalents and Java RMI communication has been transformed to VeriSoft C++ inter-process communication. We present the details of this transformation and discuss preliminary results for a number of small examples.
Related Topics
Physical Sciences and Engineering
Computer Science
Computational Theory and Mathematics
Authors
Timothy Cassidy, James R. Cordy, Thomas R. Dean, Juergen Dingel,