Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10329459 | Electronic Notes in Theoretical Computer Science | 2005 | 16 Pages |
Abstract
QDDC is a logic for specifying quantitative timing aspects of synchronous programs. Properties such as worst-case response time and latency (when known) can be specified elegantly in this logic and model checked. However, computing these values requires finding by trial and error the least/greatest value of a parameter k making a formula D(k) valid for a program. In this paper, we discuss how an automata theoretic decision procedure for QDDC together with symbolic search for shortest/longest path can be used to compute the lengths of extremal (least/greatest length) models of a formula D. These techniques have been implemented into the DCVALID verifier for QDDC formulae. We illustrate the use of this technique by efficiently computing response and dead times of some synchronous bus arbiter circuits.
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Physical Sciences and Engineering
Computer Science
Computational Theory and Mathematics
Authors
Paritosh K. Pandya,