Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10332664 | Journal of Computer and System Sciences | 2005 | 22 Pages |
Abstract
We apply our analysis to show that a few bits of precision can be saved in the floating-point division (FP-DIV) micro-architecture of the AMD-K7TMmicroprocessor. These reductions in precision apply to the initial approximation and to the lengths of the multiplicands in the multiplier. When translated to cost, the reductions reflect a savings of 10.6% in the overall cost of the FP-DIV micro-architecture.
Keywords
Related Topics
Physical Sciences and Engineering
Computer Science
Computational Theory and Mathematics
Authors
Guy Even, Peter-M. Seidel, Warren E. Ferguson,