Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10341315 | Computers & Electrical Engineering | 2005 | 16 Pages |
Abstract
New bit-parallel dual basis multipliers using the modified Booth's algorithm are presented. Due to the advantage of the modified Booth's algorithm, two bits are processed in parallel for reduction of both space and time complexities. A multiplexer-based structure has been proposed for realization of the proposed multiplication algorithm. We have shown that our multiplier saves about 9% space complexity as compared to other existing multipliers if the generating polynomial is trinomial or all one polynomial. Furthermore, the proposed multiplier is faster than existing multipliers.
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Physical Sciences and Engineering
Computer Science
Computer Networks and Communications
Authors
Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin,