Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10407063 | Materials Science in Semiconductor Processing | 2013 | 6 Pages |
Abstract
We propose an innovative voltage-contrast (VC) inspection approach for detection and verification of the process window for contact-to-poly overlaying. The method uses alternative scans for inline detection of leakage induced by underneath overlay drift. Conventional optical inspection with box-in-box or bar-in-bar test structures cannot accurately indicate the overall overlay performance for all chip locations as geometries continue to shrink. An e-beam inspection system with VC contrast imaging was introduced during a recent technology update. The alternative e-beam system with positive and negative charging modes was set up to perform dual scans for sensitive pMOS and nMOS detection. Although positive-mode scanning can detect pMOS leakage on the surface, it indicates a normal subsurface with no leakage. Defects can only be identified by another scan in negative mode to detect contact-to-poly misalignment in the neighboring nMOS. Leakage electrons affect each other as they spread through poly lines crossing p/nMOS. The principle and mechanisms for leakage defects were verified in a series of corrective actions for misalignment. The methodology allows inline detection instead of end-of-line electrical testing and de-layered analysis. This greatly shortens the response time and facilitates yield learning.
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Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
Hunglin Chen, Rongwei Fan, Hsiaochi Lou, Yiping Huang,