Article ID Journal Published Year Pages File Type
11028114 AEU - International Journal of Electronics and Communications 2018 12 Pages PDF
Abstract
In this work, a dual metal (DM) double-gate (DG) Tunnel Field Effect Transistor (DMDG-TFET) with drain-gate underlap is proposed to overcome the challenges in conventional TFET. The ON-current (Ion), OFF-current (Ioff), Ion/Ioff ratio, subthreshold swing (SS) and ambipolar current (Iambi) of the proposed device with drain underlap are investigated as gate length is scaled (LGATE) down. The proposed device gives a better suppression in leakage current and low ambipolar current. The suppressed leakage current (Ioff) and ambipolar current (Iambi) are 9.49 × 10−14 A/µm and 1.95 × 10−12 A/µm respectively for a gate length (LGATE) of 36 nm and a channel length (LCh) of 50 nm for a supply voltage of 0.5 V. Excellent switching behavior is achieved when gate length (LGATE) is 72% of the channel length (LCh). The proposed architecture is suitable for low power applications.
Related Topics
Physical Sciences and Engineering Computer Science Computer Networks and Communications
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